Name Implemented tests Planned tests Implementation progress Passing runs Total runs Pass Rate
Controller-specific CSR access check 4 4 100% 0 40.0%
Target 10 10 100% 10 10100%
Data over-/underflow handling 6 6 100% 6 6100%
CCC handling 21 21 100% 26 26100%
CSR access check 6 6 100% 6 6100%
Target error detection 6 6 100% 6 6100%
Enter and exit HDR mode 4 4 100% 4 4100%
Target interrupts 4 4 100% 8 8100%
Recovery mode tests 17 17 100% 17 17100%
Recovery bypass 10 1190.9% 10 10100%
target_peripheral_reset 2 2 100% 2 2100%

Progress of stages

Stage Implemented tests Planned tests Implementation progress Passing runs Total runs Pass Rate
N.A. 90 9198.9% 95 9996.0%