| simple_write_read | indirect_fifo_write | 3.748 | 14700.010 | 2 | 2 | 100.00 % |
| check_csr_access | ocp_csr_access_bypass_enabled | 0.125 | 434.010 | 1 | 1 | 100.00 % |
| | ocp_csr_access_bypass_disabled | 3.811 | 14326.010 | 1 | 1 | 100.00 % |
| recovery_status_wires | payload_available | 13.011 | 108806.010 | 2 | 2 | 100.00 % |
| | image_activated | 1.391 | 6980.010 | 2 | 2 | 100.00 % |
| indirect_fifo_overflow | indirect_fifo_overflow | 0.188 | 830.010 | 1 | 1 | 100.00 % |
| indirect_fifo_underflow | indirect_fifo_underflow | 0.023 | 54.010 | 1 | 1 | 100.00 % |
| i3c_bus_traffic_during_loopback | i3c_bus_traffic_during_loopback | 19.768 | 82762.040 | 1 | 1 | 100.00 % |
| check_axi_filtering | axi_filtering | 0.581 | 2012.010 | 1 | 1 | 100.00 % |
| recovery_flow | recovery_flow | 37.610 | 349145.175 | 2 | 2 | 100.00 % |
| cptra_mcu_recovery | cptra_mcu_recovery | | | 0 | 0 | -- % |
| | TOTAL | | | 14 | 14 | 100.00 % |