| simple_write_read | indirect_fifo_write | 0.203 | 1614.000 | 1 | 1 | 100% |
| check_csr_access | ocp_csr_access_bypass_enabled | 0.076 | 488.000 | 1 | 1 | 100% |
| | ocp_csr_access_bypass_disabled | 1.653 | 14420.000 | 1 | 1 | 100% |
| recovery_status_wires | payload_available | 0.202 | 1546.000 | 1 | 1 | 100% |
| | image_activated | 0.022 | 140.000 | 1 | 1 | 100% |
| indirect_fifo_overflow | indirect_fifo_overflow | 0.110 | 884.000 | 1 | 1 | 100% |
| indirect_fifo_underflow | indirect_fifo_underflow | 0.017 | 108.000 | 1 | 1 | 100% |
| i3c_bus_traffic_during_loopback | i3c_bus_traffic_during_loopback | 8.096 | 77424.060 | 1 | 1 | 100% |
| check_axi_filtering | axi_filtering | 0.336 | 2066.000 | 1 | 1 | 100% |
| bypass_read | read | 0.045 | 284.000 | 1 | 1 | 100% |
| cptra_mcu_recovery | recovery_flow | 0.934 | 7590.000 | 1 | 1 | 100% |
| bypass_to_i3c_switch | bypass_to_normal_mode_switch | 6.988 | 32243.810 | 1 | 1 | 100% |
| | TOTAL | | | 12 | 12 | 100% |