| simple_write_read | indirect_fifo_write_bypass | 0.355 | 1560.000 | 1 | 1 | 100% |
| check_csr_access | ocp_csr_access_bypass_enabled | 0.120 | 434.000 | 1 | 1 | 100% |
| | ocp_csr_access_bypass_disabled | 3.607 | 14326.000 | 1 | 1 | 100% |
| recovery_status_wires | payload_available_bypass | 0.333 | 1492.000 | 1 | 1 | 100% |
| | image_activated_bypass | 0.027 | 80.000 | 1 | 1 | 100% |
| indirect_fifo_overflow | indirect_fifo_overflow | 0.190 | 830.000 | 1 | 1 | 100% |
| indirect_fifo_underflow | indirect_fifo_underflow | 0.020 | 54.000 | 1 | 1 | 100% |
| i3c_bus_traffic_during_loopback | i3c_bus_traffic_during_loopback | 18.279 | 85210.060 | 1 | 1 | 100% |
| check_axi_filtering | axi_filtering | 0.586 | 2012.000 | 1 | 1 | 100% |
| recovery_flow | recovery_flow_bypass | 2.958 | 13252.000 | 1 | 1 | 100% |
| cptra_mcu_recovery | cptra_mcu_recovery | | | 0 | 0 | --% |
| | TOTAL | | | 10 | 10 | 100% |