| simple_write_read |
indirect_fifo_write |
3.832 |
14700.010 |
2 |
2 |
100.00 % |
| check_csr_access |
ocp_csr_access_bypass_enabled |
0.118 |
434.010 |
1 |
1 |
100.00 % |
|
ocp_csr_access_bypass_disabled |
3.890 |
14326.010 |
1 |
1 |
100.00 % |
| recovery_status_wires |
payload_available |
14.291 |
109201.010 |
2 |
2 |
100.00 % |
|
image_activated |
1.437 |
6979.010 |
2 |
2 |
100.00 % |
| indirect_fifo_overflow |
indirect_fifo_overflow |
0.198 |
830.010 |
1 |
1 |
100.00 % |
| indirect_fifo_underflow |
indirect_fifo_underflow |
0.023 |
54.010 |
1 |
1 |
100.00 % |
| i3c_bus_traffic_during_loopback |
i3c_bus_traffic_during_loopback |
19.025 |
75466.040 |
1 |
1 |
100.00 % |
| check_axi_filtering |
axi_filtering |
0.561 |
2012.010 |
1 |
1 |
100.00 % |
| recovery_flow |
recovery_flow |
37.720 |
347194.175 |
2 |
2 |
100.00 % |
| cptra_mcu_recovery |
cptra_mcu_recovery |
|
|
0 |
0 |
-- % |
|
TOTAL |
|
|
14 |
14 |
100.00 % |
|
TOTAL |
|
|
14 |
14 |
100.00 % |