| simple_write_read | indirect_fifo_write | 0.256 | 1614.000 | 1 | 1 | 100% |
| check_csr_access | ocp_csr_access_bypass_enabled | 0.093 | 488.000 | 1 | 1 | 100% |
| | ocp_csr_access_bypass_disabled | 2.267 | 14420.000 | 1 | 1 | 100% |
| recovery_status_wires | payload_available | 0.252 | 1546.000 | 1 | 1 | 100% |
| | image_activated | 0.027 | 140.000 | 1 | 1 | 100% |
| indirect_fifo_overflow | indirect_fifo_overflow | 0.139 | 884.000 | 1 | 1 | 100% |
| indirect_fifo_underflow | indirect_fifo_underflow | 0.023 | 108.000 | 1 | 1 | 100% |
| i3c_bus_traffic_during_loopback | i3c_bus_traffic_during_loopback | 10.786 | 75984.090 | 1 | 1 | 100% |
| check_axi_filtering | axi_filtering | 0.416 | 2066.000 | 1 | 1 | 100% |
| bypass_read | read | 0.051 | 284.000 | 1 | 1 | 100% |
| cptra_mcu_recovery | recovery_flow | 0.829 | 5256.000 | 1 | 1 | 100% |
| bypass_to_i3c_switch | bypass_to_normal_mode_switch | 6.520 | 26447.170 | 1 | 1 | 100% |
| | TOTAL | | | 12 | 12 | 100% |