| target_peripheral_reset | target_peripheral_reset | 0.715 | 1330.329 | 1 | 1 | 100% |
| target_escalated_reset | target_escalated_reset | 1.135 | 6954.948 | 1 | 1 | 100% |
| reset_at_min_timing | reset_at_min_timing | 0.233 | 3234.231 | 1 | 1 | 100% |
| 13_transitions_fails | 13_transitions_fails | 0.986 | 3681.678 | 1 | 1 | 100% |
| 15_transitions_before_scl | 15_transitions_before_scl | 2.231 | 4861.857 | 1 | 1 | 100% |
| scl_glitch_during_pattern | scl_glitch_during_pattern | 0.956 | 3960.957 | 1 | 1 | 100% |
| scl_glitch_during_pattern_final_edge | scl_glitch_during_pattern_final_edge | 0.963 | 3819.816 | 1 | 1 | 100% |
| sda_stable_low_during_await_scl | sda_stable_low_during_await_scl | 0.954 | 3960.957 | 1 | 1 | 100% |
| scl_drops_during_await_sr | scl_drops_during_await_sr | 0.986 | 4030.026 | 1 | 1 | 100% |
| scl_drops_during_await_p | scl_drops_during_await_p | 0.961 | 4102.098 | 1 | 1 | 100% |
| back_to_back_resets | back_to_back_resets | 0.977 | 8909.901 | 1 | 1 | 100% |
| reset_after_failed_pattern | reset_after_failed_pattern | 0.885 | 6438.432 | 1 | 1 | 100% |
| first_edge_must_be_falling | first_edge_must_be_falling | 0.265 | 3891.888 | 1 | 1 | 100% |
| timing_at_2x_minimum | timing_at_2x_minimum | 0.377 | 5894.889 | 1 | 1 | 100% |
| very_fast_timing_below_spec | very_fast_timing_below_spec | 0.107 | 1324.323 | 1 | 1 | 100% |
| mixed_valid_and_invalid_patterns | mixed_valid_and_invalid_patterns | 1.780 | 12168.156 | 1 | 1 | 100% |
| | TOTAL | | | 16 | 16 | 100% |