CHIPS Alliance Caliptra Open Source I3C coreΒΆ Introduction Documentation structure I3C core overview Configuration script System Bus Virtual target Register descriptions Target Interface Queues Target recovery interface Private reads and writes In-Band Interrupts (IBI) I3C Common Command Codes (CCC) Other features Physical Layer Common PHY Layer Design verification Testplans for individual blocks Testplans for the core Specification for I3C Vendor-Specific Extended Capabilities Security Extended Capabilities Vendor-specific Extended Capabilities Recovery flow Recovery handler CSR access via I3C Recovery handler operation Register descriptions I3CCSR address map I3CBase register file PIOControl register file I3C_EC register file SecFwRecoveryIf register file StdbyCtrlMode register file TTI register file SoCMgmtIf register file CtrlCfg register file DAT memory DCT memory Last update: 2025-04-02