| tti_tx_capacity_status | tti_tx_capacity_status | 0.008 | 14 | 1 | 1 | 100% |
| tti_tx_desc_capacity_status | tti_tx_desc_capacity_status | 0.016 | 12 | 1 | 1 | 100% |
| tti_rx_capacity_status | tti_rx_capacity_status | 0.008 | 14 | 1 | 1 | 100% |
| tti_rx_desc_capacity_status | tti_rx_desc_capacity_status | 0.008 | 14 | 1 | 1 | 100% |
| tti_tx_setup_threshold | tti_tx_setup_threshold | 0.018 | 48 | 1 | 1 | 100% |
| tti_tx_desc_setup_threshold | tti_tx_desc_setup_threshold | 0.026 | 52 | 1 | 1 | 100% |
| tti_rx_setup_threshold | tti_rx_setup_threshold | 0.017 | 48 | 1 | 1 | 100% |
| tti_rx_desc_setup_threshold | tti_rx_desc_setup_threshold | 0.019 | 54 | 1 | 1 | 100% |
| tti_ibi_setup_threshold | tti_ibi_setup_threshold | 0.016 | 48 | 1 | 1 | 100% |
| tti_ibi_should_raise_thld_trig | tti_ibi_should_raise_thld_trig | 0.103 | 534 | 1 | 1 | 100% |
| tti_rx_desc_should_raise_thld_trig | tti_rx_desc_should_raise_thld_trig | 0.016 | 54 | 1 | 1 | 100% |
| tti_tx_desc_should_raise_thld_trig | tti_tx_desc_should_raise_thld_trig | 0.124 | 594 | 1 | 1 | 100% |
| tti_ibi_capacity_status | tti_ibi_capacity_status | 0.008 | 14 | 1 | 1 | 100% |
| | TOTAL | | | 13 | 13 | 100% |