Introduction

This document summarizes the current state of the I3C core developed by Antmicro for Caliptra within CHIPS Alliance.

The implementation follows the Errata 01 for MIPI I3C Basic Specification Version 1.1.1 dated 11.03.2022.

Documentation structure

This documentation comprises the following chapters:

• overview - summarizes the main notions of the project
• ccc - provides an overview of the CCCs implemented by the core
• phy - provides a description of the I3C PHY Layer logic
• dv - describes verification tooling and testplans
• ext_cap - provides a description of Target Transaction Interface
• i3c_recovery_flow - describes the I3C-based Recovery mode workflow
• axi_id_filtering - provides information about the AXI transactions filtering feature
• axi_recovery_flow - describes the alternative, optional, recovery flow where the recovery data is transferred to the core over the AXI bus
• registers - provides auto-generated register descriptions
• known_limitations - provides information about known core limitaions in specific releases