2. Overview
  4. OCP Specifications
  5. Caliptra Specification
  7. Core Hardware Specifications
  8. Hardware Specification
  9. Integration Specification
  10. Adam's Bridge Hardware Specification
  11. Core Registers ↗
  13. Subsystem Hardware Specifications
  14. Subsystem Hardware Specification
  15. Subsystem Integration Specification
  16. OTP Fuse Map (default)
  17. Subsystem Registers ↗
  18. I3C Core Specification
    1. Overview
    2. PHY Layer
    3. Verification
    4. Extended Capabilities
    5. Recovery Flow
    6. AXI ID Filtering
    7. AXI Recovery Flow
    8. Registers
  21. Core Firmware Specifications
  22. ROM Specification
  23. Auth Manifest Specification
  24. FMC Specification
  25. Runtime Specification
  27. MCU Firmware Specifications
  28. MCU Specification
  29. Reference ROM Specification
    1. ROM I3C Services
    2. Device Ownership Transfer
      1. DOT I3C Recovery Protocol
    4. ROM Fuses
    5. SVN Anti-Rollback
  31. Runtime Specification
    1. Firmware Format
    2. PLDM Package
    3. Flash Layout
    4. Flash Controller
    5. Image Loading
    6. Attestation Manifest
    7. MCTP
    8. SPDM
      1. PCI DOE
      2. IDE Key Management
      3. TDISP
      4. In-field Provisioning and Management of SPDM Certificate Slots
    10. PLDM
    11. Firmware Update
    12. Common Caliptra Commands
      1. SPDM VDM Commands
      2. Unified Command Handling
    14. External Mailbox Commands
    15. External MCTP VDM Commands
    16. Logging
    17. In-Field Fuse Programming
  33. Out of Tree Build
  34. Reference Provisioning Guide
  35. Running with an FPGA
  36. Caliptra Utility Host Library
  37. Network Boot Recovery
  38. Integrator's Guide
    1. SPDM Integration Guide
  40. Testing
    1. I3C Testing over TCP
  43. Reference
  44. Additional Resources