First Caliptra 2.1 Subsystem Silicon Successfully Powers On

The first Caliptra 2.1 Subsystem silicon has successfully powered on with all post-silicon validation tests passing, marking a major milestone for open, interoperable, quantum-ready silicon security.

August 19, 2026

4 min read

First Caliptra 2.1 Subsystem Silicon Successfully Powers On

The Caliptra Consortium is excited to announce a major milestone for the open silicon security ecosystem: the first Caliptra 2.1 Subsystem silicon has successfully powered on, achieving a flawless bring-up with all post-silicon validation tests passing successfully.

Achieved less than nine months after the release of the Caliptra 2.1 Subsystem, this milestone highlights both the maturity of the architecture and the strength of industry collaboration. We are especially grateful to ASPEED Technology Inc. for leading the integration effort in its next-generation SMC and BMC products and for helping demonstrate the readiness of the Caliptra 2.1 platform in silicon.

This achievement builds on the success of Caliptra 1.0, which established the industry’s first open and interoperable hardware root of trust and is now shipping in production silicon across the ecosystem. With Caliptra 2.0 and 2.1, the community has expanded that vision into the industry’s first fully open-source, quantum-ready silicon security subsystem, providing a stronger foundation for secure boot, attestation, recovery, cryptographic services, and hardware key management.

Beyond the silicon milestone itself, the momentum across the Caliptra ecosystem continues to accelerate. Companies around the world are actively integrating Caliptra into new SoCs and infrastructure platforms, contributing to a growing ecosystem committed to open, interoperable silicon security.

Caliptra Manufacturing Workshop Brings Together the Ecosystem

That momentum was clearly visible last week at the Caliptra Manufacturing Workshop in Taipei, Taiwan. The event brought together more than 130 participants from 16 companies, representing a broad cross-section of the semiconductor and infrastructure industries.

Designed for engineers responsible for silicon, board bring-up, and manufacturing readiness, the workshop focused on the practical aspects of provisioning and deploying Caliptra-enabled SoCs at scale. Sessions covered critical integration topics including:

Boot and initialization flows
Debug and validation methodologies
eFuse provisioning
Certificate provisioning and lifecycle management
Manufacturing and provisioning workflows
Configuration and deployment of Caliptra-based SoCs

The workshop also showcased companies helping to build the broader Caliptra support ecosystem. For example, PUFsecurity demonstrated how it is building on Caliptra to provide turnkey integration services and security solutions. These offerings are complemented by process-specific security technologies such as entropy and noise-source solutions, physically unclonable function (PUF) technologies, and eFuse implementations that have been validated for advanced TSMC process nodes, including 3nm and 2nm technologies.

The strong participation, technical engagement, and growing ecosystem support underscore a shared industry commitment to advancing open silicon security standards and accelerating adoption across the market.

We are pleased to share the workshop presentations below, along with photos from the event. We would like to thank all attendees, contributors, and ecosystem partners whose collaboration continues to make these milestones possible.

Together, we are building the future of open, interoperable, and quantum-ready silicon security.

Presentations

Pictures from the Workshop