- Overview
- 1. Caliptra Overview
- OCP Specifications
- 2. OCP L.O.C.K. Specification
- Core Hardware Specifications
- 3. Hardware Specification
- 4. Integration Specification
- 5. Adam's Bridge Hardware Specification
- 5.1. ML-DSA Documentation
- 5.2. ML-KEM Documentation
- 6. Core Registers ↗
- Subsystem Hardware Specifications
- 7. Subsystem Hardware Specification
- 8. Subsystem Integration Specification
- 9. OTP Fuse Map (default)
- 10. Subsystem Registers ↗
- 11. I3C Core Specification
- 11.1. Overview
- 11.2. PHY Layer
- 11.3. Verification
- 11.4. Extended Capabilities
- 11.5. Recovery Flow
- 11.6. AXI ID Filtering
- 11.7. AXI Recovery Flow
- 11.8. Registers
- Core Firmware Specifications
- 12. ROM Specification
- 13. Auth Manifest Specification
- 14. FMC Specification
- 15. Runtime Specification
- MCU Firmware Specifications
- 16. MCU Specification
- 17. Reference ROM Specification
- 17.1. ROM I3C Services
- 17.2. Device Ownership Transfer
- 17.2.1. DOT I3C Recovery Protocol
- 17.3. ROM Fuses
- 17.4. SVN Anti-Rollback
- 18. Runtime Specification
- 18.1. Firmware Format
- 18.2. PLDM Package
- 18.3. Flash Layout
- 18.4. Flash Controller
- 18.5. Image Loading
- 18.6. Attestation Manifest
- 18.7. MCTP
- 18.8. SPDM
- 18.8.1. PCI DOE
- 18.8.2. IDE Key Management
- 18.8.3. TDISP
- 18.8.4. In-field Provisioning and Management of SPDM Certificate Slots
- 18.9. PLDM
- 18.10. Firmware Update
- 18.11. Common Caliptra Commands
- 18.11.1. SPDM VDM Commands
- 18.11.2. Unified Command Handling
- 18.12. External Mailbox Commands
- 18.13. External MCTP VDM Commands
- 18.14. Logging
- 18.15. In-Field Fuse Programming
- 19. Out of Tree Build
- 20. Reference Provisioning Guide
- 21. Running with an FPGA
- 22. Caliptra Utility Host Library
- 23. Network Boot Recovery
- 24. Integrator's Guide
- 24.1. SPDM Integration Guide
- 25. Testing
- 25.1. I3C Testing over TCP
- Reference
- 26. Additional Resources