Line data Source code
1 : module el2_btb_tag_hash
2 : import el2_pkg::*;
3 : #(
4 : `include "el2_param.vh"
5 : ) (
6 26 : input logic [pt.BTB_ADDR_HI+pt.BTB_BTAG_SIZE+pt.BTB_BTAG_SIZE+pt.BTB_BTAG_SIZE:pt.BTB_ADDR_HI+1] pc,
7 741091 : output logic [pt.BTB_BTAG_SIZE-1:0] hash
8 : );
9 :
10 : assign hash = {(pc[pt.BTB_ADDR_HI+pt.BTB_BTAG_SIZE+pt.BTB_BTAG_SIZE+pt.BTB_BTAG_SIZE:pt.BTB_ADDR_HI+pt.BTB_BTAG_SIZE+pt.BTB_BTAG_SIZE+1] ^
11 : pc[pt.BTB_ADDR_HI+pt.BTB_BTAG_SIZE+pt.BTB_BTAG_SIZE:pt.BTB_ADDR_HI+pt.BTB_BTAG_SIZE+1] ^
12 : pc[pt.BTB_ADDR_HI+pt.BTB_BTAG_SIZE:pt.BTB_ADDR_HI+1])};
13 : endmodule
14 :
15 : module el2_btb_tag_hash_fold
16 : import el2_pkg::*;
17 : #(
18 : `include "el2_param.vh"
19 : )(
20 : input logic [pt.BTB_ADDR_HI+pt.BTB_BTAG_SIZE+pt.BTB_BTAG_SIZE:pt.BTB_ADDR_HI+1] pc,
21 : output logic [pt.BTB_BTAG_SIZE-1:0] hash
22 : );
23 :
24 : assign hash = {(
25 : pc[pt.BTB_ADDR_HI+pt.BTB_BTAG_SIZE+pt.BTB_BTAG_SIZE:pt.BTB_ADDR_HI+pt.BTB_BTAG_SIZE+1] ^
26 : pc[pt.BTB_ADDR_HI+pt.BTB_BTAG_SIZE:pt.BTB_ADDR_HI+1])};
27 :
28 : endmodule
29 :
30 : module el2_btb_addr_hash
31 : import el2_pkg::*;
32 : #(
33 : `include "el2_param.vh"
34 : )(
35 3402700 : input logic [pt.BTB_INDEX3_HI:pt.BTB_INDEX1_LO] pc,
36 3518316 : output logic [pt.BTB_ADDR_HI:pt.BTB_ADDR_LO] hash
37 : );
38 :
39 :
40 : if(pt.BTB_FOLD2_INDEX_HASH) begin : fold2
41 : assign hash[pt.BTB_ADDR_HI:pt.BTB_ADDR_LO] = pc[pt.BTB_INDEX1_HI:pt.BTB_INDEX1_LO] ^
42 : pc[pt.BTB_INDEX3_HI:pt.BTB_INDEX3_LO];
43 : end
44 : else begin
45 : assign hash[pt.BTB_ADDR_HI:pt.BTB_ADDR_LO] = pc[pt.BTB_INDEX1_HI:pt.BTB_INDEX1_LO] ^
46 : pc[pt.BTB_INDEX2_HI:pt.BTB_INDEX2_LO] ^
47 : pc[pt.BTB_INDEX3_HI:pt.BTB_INDEX3_LO];
48 : end
49 :
50 : endmodule
51 :
52 : module el2_btb_ghr_hash
53 : import el2_pkg::*;
54 : #(
55 : `include "el2_param.vh"
56 : )(
57 983832 : input logic [pt.BTB_ADDR_HI:pt.BTB_ADDR_LO] hashin,
58 1449628 : input logic [pt.BHT_GHR_SIZE-1:0] ghr,
59 1944698 : output logic [pt.BHT_ADDR_HI:pt.BHT_ADDR_LO] hash
60 : );
61 :
62 : // The hash function is too complex to write in verilog for all cases.
63 : // The config script generates the logic string based on the bp config.
64 : if(pt.BHT_GHR_HASH_1) begin : ghrhash_cfg1
65 : assign hash[pt.BHT_ADDR_HI:pt.BHT_ADDR_LO] = { ghr[pt.BHT_GHR_SIZE-1:pt.BTB_INDEX1_HI-1], hashin[pt.BTB_INDEX1_HI:2]^ghr[pt.BTB_INDEX1_HI-2:0]};
66 : end
67 : else begin : ghrhash_cfg2
68 : assign hash[pt.BHT_ADDR_HI:pt.BHT_ADDR_LO] = { hashin[pt.BHT_GHR_SIZE+1:2]^ghr[pt.BHT_GHR_SIZE-1:0]};
69 : end
70 :
71 :
72 : endmodule
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