Line data    Source code

       1              : // DMI core aperture ranges from 0x00 to 0x4F. Addresses starting from 0x50
       2              : // and above are considered uncore.
       3              : 
       4              : module dmi_mux (
       5              : 
       6              :     // Uncore access enable
       7            1 :     input wire uncore_enable,
       8              : 
       9              :     // DMI upstream
      10          270 :     input  wire        dmi_en,
      11          128 :     input  wire        dmi_wr_en,
      12            3 :     input  wire [ 6:0] dmi_addr,
      13           22 :     input  wire [31:0] dmi_wdata,
      14           14 :     output wire [31:0] dmi_rdata,
      15              : 
      16              :     // DMI downstream for core
      17          262 :     output wire        dmi_core_en,
      18          124 :     output wire        dmi_core_wr_en,
      19            3 :     output wire [ 6:0] dmi_core_addr,
      20           22 :     output wire [31:0] dmi_core_wdata,
      21           13 :     input  wire [31:0] dmi_core_rdata,
      22              : 
      23              :     // DMI downstream for uncore
      24            8 :     output wire        dmi_uncore_en,
      25            4 :     output wire        dmi_uncore_wr_en,
      26            3 :     output wire [ 6:0] dmi_uncore_addr,
      27           22 :     output wire [31:0] dmi_uncore_wdata,
      28            1 :     input  wire [31:0] dmi_uncore_rdata
      29              : );
      30            7 :   logic is_uncore_aperture;
      31              : 
      32              :   // Uncore address decoder
      33              :   assign is_uncore_aperture = (dmi_addr[6] & (dmi_addr[5] | dmi_addr[4]));
      34              : 
      35              :   // Core signals
      36              :   assign dmi_core_en        = dmi_en & ~is_uncore_aperture;
      37              :   assign dmi_core_wr_en     = dmi_wr_en & ~is_uncore_aperture;
      38              :   assign dmi_core_addr      = dmi_addr;
      39              :   assign dmi_core_wdata     = dmi_wdata;
      40              : 
      41              :   // Uncore signals
      42              :   assign dmi_uncore_en      = dmi_en & is_uncore_aperture & uncore_enable;
      43              :   assign dmi_uncore_wr_en   = dmi_wr_en & is_uncore_aperture & uncore_enable;
      44              :   assign dmi_uncore_addr    = dmi_addr;
      45              :   assign dmi_uncore_wdata   = dmi_wdata;
      46              : 
      47              :   // Read mux
      48              :   assign dmi_rdata          = is_uncore_aperture ? dmi_uncore_rdata : dmi_core_rdata;
      49              : 
      50              : endmodule